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Intel Arrow Lake CPU: Four-Tile Architecture with Coherent P-Core and E-Core Fabric

The leaked CPU layout and architecture specifications for Intel's next-gen Arrow Lake CPUs suggest a semi-chipset package with four main tiles. Arrow Lake instead brings key performance improvements to mainstream…

July 15, 2024
3 min read

The leaked CPU layout and architecture specifications for Intel‘s next-gen Arrow Lake CPUs suggest a semi-chipset package with four main tiles. Arrow Lake instead brings key performance improvements to mainstream and high-end PCs, while Lunar Lake has been designed specifically with thin-and-light laptops in mind.

Arrow Lake

More About the Intel Arrow Lake CPU

Arrow Lake CPUs will have four main tiles in common with Meteor Lake’s Core Ultra 100, as well as a base tile. Together with the CPU, these tiles form that include Lion Cove P-Cores and Skymont E-Cores which have an L2 cache and power management unit. These cores are coherently connected and share the L3 cache with other LP variants of Lunar Lake, but feature better clock speeds and IPC over their power-efficient class.

Intel’s next-gen Arrow Lake “Core Ultra 200” CPUs will be released in the form of various different die configurations, and include: Arrow Lake-S (Desktop), Arrow Lake-HX (Enthusiast Laptop), Arrow Lake-H (High-End Laptop), Arrow Lake-U (Mainstream Laptop), and Arrow Lake-WS (Xeon Workstation) SKUs. The initial configurations are 8+16, 6+8, and 2+8 dies have been disclosed, with more variants expected.

Lunar Lake is said to use TSMC N3B and N6 nodes for the CPU architecture, with either a 20A or an N3B process possibly being used as its Compute Tile in Arrow Lake (to be confirmed). The GPU Tile employs Intel’s latest Xe graphics architecture, and it can contain up to two GPU slices with a dedicated L3 cache and power management unit as well. The IOE Tile includes a Thunderbolt controller supporting TBT4/USB4/DP outputs and PCIe lanes.

The largest segment, the SoC Tile, hosts critical components such as the memory fabric, memory controller (DDR5/LPDDR5/LPDDR5X), Security Complex, Power Manager, and various connectivity interfaces. In this D2D (Die-To-Die) interconnect, all of the tiles within Foveros packaging technology join together to form a single monolithic package.

Arrow Lake “Core Ultra 200” desktop “S” variants will be the first CPUs of Intel to sport in October, courtesy of LGA 1851 socketed motherboards featuring some version from their upcoming Arrow Lake series Z890 chipset. Expect further details to be announced at Intel’s next Innovation event in September.

FAQs

What is the significance of the coherent fabric in Intel’s Arrow Lake CPU?

The coherent fabric in Arrow Lake CPU’s CPU Tile connects P-Cores and E-Cores with a shared L3 cache, facilitating efficient communication and enhancing overall performance.

Will Intel Arrow Lake CPUs support DDR5 memory?

Yes, Arrow Lake CPUs will support DDR5 memory, along with options for LPDDR5 and LPDDR5X, depending on the SKU and intended platform.
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