AMD’s rumoured Instinct MI300 accelerator spotted with four chipset GPU

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There is an interesting story that recently popped up on Twitter and it’s the discovery of something called the “SH5”. The information was posted by a Twitter user ExecutableFix and this SH5 is speculated to refer to the new AMD Instinct MI300 accelerator which will be the successor to MI200.

AMD is yet to release its MI200 the fact that a new MI200 is slated to be released by the end of 2021 is yet but amazing. This is why the new socket leak is under heavy speculation.

Inside the AMD Instinct MI200 is an Aldebaran GPU featuring two dies, a secondary and a primary. It has two dies with each consisting of 8 shader engines for a total of 16 SE’s. Each Shader Engine packs 16 CUs with full-rate FP64, packed FP32 & a 2nd Generation Matrix Engine for FP16 & BF16 operations. Each die, as such, is composed of 128 compute units or 8192 stream processors. This rounds up to a total of 220 compute units or 14,080 stream processors for the entire chip. The Aldebaran GPU is also powered by a new XGMI interconnect. Each chipset features a VCN 2.6 engine and the main IO controller.

Instinct MI300
4RABET

As for DRAM, AMD has gone with an 8-channel interface consisting of 1024-bit interfaces for an 8192-bit wide bus interface. Each interface can support 2GB HBM2e DRAM modules. This should give us up to 16 GB of HBM2e memory capacity per stack and since there are eight stacks in total, the total amount of capacity would be a whopping 128 GB. That’s 48 GB more than the A100 which houses 80 GB HBM2e memory.

According to rumours, the MI300 will feature four chipsets for GPUs and will have twice the amount which will be available for MI200. MI300 is not slated to release for another year or longer from other sources’ estimations.

The leaker also mentions that the SH5 variants might include a Zen4 CPU chip in the same packaging, however, this information is still under speculations. AMD has stated that “Exascale APUs” in the whitepaper, “Design and Analysis of an APU for Exascale Computing.” In the paper, AMD hinted at a high-performance APU design that “stacked HBM memory on top of GPU chipsets which would be combined with CPU chipsets.”

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Just two years ago, we saw another leak from the Twitter user Komachi who first found information about the hints of AMD MI200 BIG APU mode about the MI200.

source

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Nivedita Bangari
I am a software engineer by profession and technology is my love, learning and playing with new technologies is my passion.

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