The South Korean media is asserting that TSMC’s essential 3-nanometer manufacturing process is delayed as a result of the earnings report for the third fiscal quarter from the Taiwan Semiconductor Manufacturing Company (TSMC). This has given Samsung Foundry an advantage, according to a report from Business Korea, ever since the business started 3-nanometer production earlier this year – an announcement that was met with scepticism over any orders Samsung might have gotten for the new technology.
According to TSMC management’s comments on the results call, volume production of 3-nanometer products is expected to begin later this quarter, according to the article. According to Business Korea, who cites earlier claims in the Taiwanese media to assert that TSMC had initially scheduled manufacturing for the third quarter, this is an acknowledgement that the process has been delayed.
The main topics of TSMC’s earnings call included its ability to produce 3-nanometer semiconductors, the desire for cutting-edge technology, and the inventory correction that is wreaking havoc on the chip industry.
Before we discuss this, however, Business Korea’s article contends that TSMC’s claims that 3-nanometer volume production is planned for the current quarter really imply that production has been postponed. The management of TSMC has insisted that volume manufacturing will begin in the second half of this year for the entirety of the previous year and this one.
Dr. C.C. Wei, the chief executive officer of TSMC, stated during the conference call that his company will start volume production for N3 (3-nanometer) this quarter and that the new process technology will generate more income than its predecessor because of a wider customer base.
Dr. Wei also mentioned that the number of tape-outs for N3 and the subsequent N3E process is more than double the tape-outs for the 5-nanometer process during the latter’s first and second year, and that the demand for N3 is outstripping his company’s capacity to deliver the products.
Despite the ongoing inventory correction, we observed a high level of customer engagement at both N3 and N3E with a number of tape-outs more than 2x than that of N5 in its first and second year. We are working closely with our tool supplier to address towards delivery challenges and prepare more 3-nanometer capacity to support our customers strong demand in 2023, 2024 and beyond. Our 3-nanometer technology will be the most advanced semiconductor technology in both PPA and transistor technology when it is introduced. We are confident that N3 family will be another large and long-lasting node for TSMC.
Additionally, the use of TSMC’s 7-nanometer and 6-nanometer capacities will be impacted by the slowdown in the personal computer market, which has severely reduced the revenues of manufacturers like Intel, NVIDIA, and AMD. According to Dr. Wei, this slowdown will last into the first quarter of next year. As a result, his company has reduced capital expenditures in part as a result of this slowdown and the associated underutilization of available capacity.
He also mentioned how his customers were caught off guard by the decrease in PC demand. Dr. Wei also claimed that the projections given to him even at the beginning of this year were still highly optimistic compared to the actual demand.
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