This week, Intel and the Barcelona Supercomputing Centre (BSC) announced a €400 million (about $426 million) investment in a laboratory to create RISC-V-based processors that might be used to build zettascale supercomputers.

The facility, however, will not only focus on CPUs for next-generation supercomputers but also processor applications for artificial intelligence and driverless vehicles.

The research laboratory will most likely be located in Barcelona, Spain, and will receive €400 million over 10 years from Intel and the Spanish government. The collaborative research laboratory’s primary goal is to create chips based on the open-source RISC-V instruction set architecture (ISA) that may be utilized for a variety of applications such as AI accelerators, autonomous vehicles, and high-performance computing.

The establishment of the collaborative laboratory does not imply that Intel will employ RISC-V-based CPUs built in the lab for its first-generation zettascale supercomputing platform, but rather that the business is willing to invest further in RISC-V. After all, Intel attempted to acquire SiFive, a leading developer of RISC-V CPUs and one of the top supporters of RISC-V International, a non-profit organization that supports the ISA, last year.

While $21.3 million is a considerable quantity of money, Intel will be investing far more in its x86-based products in the coming years, thus investment in RISC-V CPUs does not imply a shift away from x86 designs

Developing the contrary, Intel has spent hundreds of millions of dollars on non-x86 architectures throughout its history, including RISC-based i960/i860 designs in the 1980s, Arm in the 2000s, and VLIW-based IA64/Itanium in the 1990s and 2000s. Although both architectures were eventually abandoned, technology developed for them found its way into x86 offerings.

Intel’s RISC-V efforts may be killing two birds with one stone. Assume that engineers from the joint laboratory are successful in developing a CPU technology that is better suitable for ZettaFLOPS-class supercomputers. In that situation, Intel will be able to include it in its devices. As a bonus, Intel’s Foundry Services business will most likely become the fab of choice for the joint lab’s CPUs/SoCs.

“High-performance computing is the key to solving the world’s most challenging problems, and we at Intel have an ambitious goal to sprint to a zettascale era for HPC,” said Jeff McVeigh, vice president and general manager of the Super Compute Group at the the the Intel. “Barcelona Supercomputing Center shares our vision for this goal, with equal emphasis on sustainability and an open approach. We are excited to partner with them to embark on this journey.”

Last year, Intel set an ambitious aim of developing a ZettaFLOPS-class supercomputer platform by 2027, which would mean increasing supercomputer performance by 1000 times in about five years.

Among other things, the business stated that it would require new computational architectures, new system architectures, high-speed memory, and I/O interfaces, revolutionary fabrication technologies, and complex chip packaging methodologies.

One of the company’s plans to dramatically boost compute performance is to create an architecture that combines x86 general-purpose CPUs with Xe-HPC compute GPUs. Falcon Shores is the first product to leverage this principle, and it is currently in development.