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AMD EPYC ROMA chips enter hiatus after 1,044 days of operation

According to the revision guide for the AMD EPYC 7002 “Rome” server processor, a chip core may hang after 1,044 days of operation. AMD EPYC Rome CPUs are based on the Zen 2 core architecture and are among the most competitive processors introduced by the Red team for the data centre industry. However, a recent issue has been discovered in which the chip will enter a sleep state after nearly three years of operation.

The timing of failure, according to AMD, is determined by the spread spectrum and the REFCLK frequency.

However, AMD’s indicated failure time may be misleading, as a Reddit user, acid_migrain, claims that the true timing may be approximately 1042 days and roughly 12 hours.

credit: tomshardware

The issue can be solved quickly and simply. Reboot, reset the CPU timer, or disable the CC6 sleep state before 1,044 days of uptime. According to the paper, AMD does not have any intentions to offer a patch for this. This is not a serious concern; similar issues occur in numerous CPUs. The EPYC 7002 was released in 2018, and this vulnerability is now being made public because it may have affected some customers because to the complete uptime (1,044 days).

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Because of the complexity of CPU architecture, various sorts of problems are discovered after the processors are packaged and ready to ship. The flaws range from the minor, such as faulty flags and cache tags, to the more serious, such as those that potentially leave an attack vector exposed.

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Nivedita Bangari
Nivedita Bangari
I am a software engineer by profession and technology is my love, learning and playing with new technologies is my passion.

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