Intel disables Transactional Synchronization Extensions on some CPUs due to security risks

Earlier this month Intel introduced a new microcode update to its CPUs and also added it to their developer’s guide. And along with this microcode update came some new and unexpected changes. One is that Intel decided to disable the Transactional Synchronization Extensions (TSX) with this new microcode on certain processor families (on both Windows and Linux). Those processors included the lineup of Skylake and Coffee Lake CPUs.

Intel® Transactional Synchronization Extensions (Intel® TSX) allow the processor to determine dynamically whether threads need to serialize through lock-protected critical sections and to perform serialization only when required. This lets the processor expose and exploit concurrence hidden in an application due to dynamically unnecessary synchronization.

With the help of TSX technology, it was possible to increase the benchmark of certain workloads as much as 40% inefficiency and make four to five times faster database transactions. However, with the removal of the TSX extension, there will be a mild drop in the CPU’s processing, and if you are someone who uses these workloads and updates to the latest microcode, there will considerable performance drop. But, there was a huge risk factor with using this tech so I guess Intel should be removing it altogether.

However, the fact that TSX has security vulnerabilities was known by Intel as far back as 2018. But with the rollout of this new microcode in the Linux 5.14 cycle patches, Intel is not only addressing most of its security issues but also starting to disable TSX on the following:

  • Xeon D and first-generation Xeon Scalable CPUs
  • Certain Skylake Xeon CPUs
  • Sixth generation Xeon E3-1500M V5 and E3-1200 V5 Skylake CPUs
  • Some seventh and eighth-generation Core and Pentium Coffee, Kaby, and Whiskey CPUs
  • Eighth and ninth-generation Core and Pentium Coffee Lake CPUs
  • Tenth generation Coffee and Ice Lake CPUs

Source

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