AMD’s chief technical officer, Mark Papermaster, announced at a conference that the company’s next-generation Instinct MI300 accelerated processing unit for data centres and high-performance computing is already operational in AMD’s labs. The APU will power the El Capitan supercomputer, which is scheduled to exceed the 2 ExaFLOPS mark sometime in 2024 using AMD’s Zen 4 and CDNA 3 architectures.
AMD’s Instinct MI300 is a multi-chiplet APU with Zen 4 general-purpose x86 cores and a CDNA 3-based computational GPU that share a unified on-package memory pool that includes Infinity Cache and HBM. AMD will build CPU/GPU chiplets for the MI300 using TSMC’s N5 (5nm-class) fabrication process, but the company has yet to reveal how many CPU cores and GPU stream processors will be crammed into the hybrid processor.
Putting CPU cores and GPU accelerators into a single package and allowing them to use unified memory is the Holy Grail of supercomputing because it not only combines the best of both worlds (general purpose processing and highly parallel acceleration), but it also dramatically simplifies programming and makes it easier to extract all of the performance potential from execution engines.
The AMD Instinct MI300 APU will power the El Capitan supercomputer, which will be deployed at the Lawrence Livermore National Laboratory (LLNL) in 2023 and will be completely operational in mid-2024.
AMD intends to release the Instinct MI300 processor in 2023, therefore it is not surprising that the chip is now operational in AMD’s labs. Meanwhile, it is uncertain whether the company would supply the MI300 in large quantities to clients outside of the supercomputer industry next year.
AMD’s Instinct MI300 will pique the interest of the supercomputing community because it will be the industry’s first data centre and HPC-grade APU. In the meantime, AMD’s Instinct MI300 will not be the only hybrid processor for data centres with x86 and GPU resources available in the next years. For example, Intel is developing the Falcon Shores product, which will include x86 and Xe-HPC cores in the same box and will be available in 2024.
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