Silicon industry giant AMD announces its new 7nm EPYC Rome processors based on Zen 2 architecture that comes with 64 cores and 128 threads
As we discussed in our previous post regarding AMD’s launches in their “Next Horizon” event, they are the first company to launch both the 7nm CPU and GPU together. So, in this post, we will discuss more the new 7nm EPYC Rome CPUs based on the new Zen 2 architecture.
“We love innovation, we love solving hard problems, we love putting new technology out there, but at the end of the day it is about what we can do for our customer and what we can do to solve some of those world’s toughest problems.” – @LisaSu #NextHorizon pic.twitter.com/eR9eMgwa6z
— AMD EPYC (@AMDServer) November 6, 2018
These are high performing server-side mainstream processors. AMD is targeting the Global industries which need high-end desktops for their customers. From cloud service providers to web servers and OEMs, everyone is in need of a high performing secured processors keeping in mind of the future.
So, the new EPYC Rome processors based on 7nm micro-architecture is the perfect one to upgrade with. It is fast, secure, uses AI and machine learning for better performance. This is named “EPYC” as in the fact stands that the Xeon processors do fail to outperform it.
So, let’s discuss all the major announcements by AMD in details:
The Zen 2 architecture
AMD’s EPYC Roadmap started with the Naples based on 14nm Zen architecture. The newer Rome is based on Zen 2 architecture which is the same architecture that will be soon seen in Ryzen 3 and ThreadRipper processors.
The Zen 2 architecture is significantly more important because, in this one, the compute cores will be shrunk to 7nm size. Yes, say goodbye to the old 14nm, 12nm size microprocessors!
Mark Papermaster, chief technology officer at AMD, spoke in detail about the new 7nm Zen 2 core and their partnership with TMSC, who will be manufacturing the new Zen 2 based processors.
On-stage at #NextHorizon, Mark Papermaster discusses AMD’s and TSMC’s mutual dedication to delivering products and technologies that reshape industries. pic.twitter.com/41G26dFtG3
— AMD (@AMD) November 6, 2018
These new chips have gone through a huge investment upfront both by AMD and TSMC. It is notable to mention that AMD’s primary manufacturing partner, Global Foundries, stepped out of the 7nm race earlier this year. Still, AMD has remained committed to delivering the new Zen 2 microarchitecture to market.
Mark claims of doubling of core density and halving of power consumption for the same performance using a 7nm microarchitecture. This potentially indicates the fact that we’ll see increased core counts in future from their CPUs.
He has also claimed that Zen 2 will offer a 1.2x performance boost in IPC over current Zen+ based CPUs by using the second generation Infinity Fabric.
The Zen 2 will provide up to:
- 2X the compute power per node,
- improved execution pipeline,
- doubled core density, and
- will use half the energy per operation.
AMD has even doubled the floating point performance with the Zen 2 microarchitecture.
AMD EPYC Rome processors
EPYC Rome processors are very much special for AMD. Previously its CEO Dr Lisa Su mentioned in an interview that, they want to target all the three sectors of usage of CPUs. From home to professional level and now server side, all of these under one roof.
As AMD’s stock is increasing day by day, they have thought its the right time to beat the industry leader Intel in the data centre and server-side sectors.
Fabricating 7nm processors was not an easy task for them, but still, they have managed. Intel is still struggling to shift to 10nm, and AMD has done and will launch its products in the first quarter of 2019.
The detailed architecture of EPYC Rome processors
The EPYC server line-up, codenamed as Rome, scales up to 64 cores and 128 threads. Now, this will help AMD’s enterprise customers to equip a single dual-socket motherboard with up to 128 cores and 256 threads. Rome is also the first PCIe 4.0 compatible CPU, that offers double the bandwidth per channel.
They feature a new and revolutionary “chiplet” ecosystem. In this, we see a 14nm I/O die that sits at the centre of the processor and has been surrounded by four 7nm CPU chiplet modules on each side.
These chiplets are interconnected with the I/O die via AMD’s second generation Infinity Fabric architecture as we discussed before. Each of the chiplet carries up to 8 cores and 16 threads.
The EPYC ‘Rome’ server-end processors will be equipped with an eight-channel DDR4 memory controller, which has been housed inside the I/O die which present in the centre. This improved design will help each chiplet to access the memory with equal latency. The multiple cores have an support to 4TB of DDR4 memory per socket.
Being the first processors to support the PCIe 4.0 standard, they have support up to 128 PCIe 4.0 lanes. This makes the EPYC Rome processors an ideal companion for AMD’s recently announced Instinct MI60 and MI50 GPU accelerators that utilize the PCIe 4.0 x16 interface.
The next Milan chips based on Zen 3 architecture is also on its way and is in the developing phase. On the other hand, AMD also assured that the Zen 4 architecture is in its designing stage, which shows their supremacy in the coming days.
Performance gain
A significant change that you get when processors get upgraded is in its IPC or instructions per clock. The amount of increase in this IPC determines how much performance increase you can expect from a processor.
AMD has delivered an impressive 52 per cent jump in IPC for its server and client processors than its older Opteron chips. AMD claims that there is a 29 per cent jump in IPC from the “Zen” cores used in the Naples EPYC chips to the “Zen 2” cores used in the Rome chips.
Shifting from 14nm to 7nm would allow a chip to have twice the transistor density at half the power consumption. This will help to deliver about a 25 per cent performance boost in the performance of those transistors at the same time.
The Rome chips will feature an improved branch predictor, better instruction pre-fetching, a larger op cache, and a re-optimized instruction cache.
The width of the floating point units has been doubled to 256 bits, including the floating point registers which are also doubled up in size to 256 bits. The memory bandwidth into and out of the load/store units has also been doubled with 256-bit data paths.
To cut it short, with twice as many cores and vector units that are twice as wide, floating point performance on Rome CPUs will be 4X that of Naples, and integer performance will be increased by 2X.
Benchmarks
Words are just not enough to prove the power and performance. So, Dr Lisa Su put to ResNet-50 image recognition benchmark test a “Vega 20” GPU accelerator probably the MI60 paired with the Rome EPYC processor against a single Naples EPYC 7601 processor with a Radeon Instinct MI25 accelerator. The Rome ran twice as fast its predecessor, which is just unbelievable.
“I have been in the semiconductor business a long time and you just don’t get 2X generational performance enhancements,” AMD CEO Dr Lisa Su said with a laugh.
AMD compared a single-socket 64 cores Rome EPYC processor with two-socket 28 cores Intel “Skylake” Xeon SP-8180M, which is Intel’s current best server end desktop processor, and also with two-socket 32-cores Naples EPYC 7601 processor.
The C-RAY ray tracing benchmark resulted in the Skylake machine to do the various renderings in 30.4 seconds, the Rome machine to do it in 27.1 seconds, and the Naples machine did it in 28.4 seconds.
To be simple, the new Rome processors have tremendous power, enough that its single core is enough to beat Intel Xeon’s 2 cores or AMD’s one-year-old Naples EPYC’s 2 cores. This makes the Rome processors “EPYC” and the best, currently in the market.
To wrap things up…
The clear advantage goes to Rome EPYC processor, especially if you consider the two of those Intel Xeon Skylake list which cost over $26,000.
Though AMD has not declared the exact price of the Rome EPYC processors, as the Naples EPYC 7601 processor is priced near about $4,200, so the Rome processors will absolutely be lesser than that of Intel’s server-end ones.
With this, we can conclude that at lower prices we can get superior end performance for the new server-end CPUs by AMD.
Being future-proof, as the same socket is compatible with the new Rome processors as well as old Naples processors, industries can easily switch to newer and better processors up till the Milan and future Zen 4 architecture based server-end CPUs from AMD.
Do check out: AMD plans to be 25x more power efficient by 2020
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