AMD showcases next-gen 3D V-Cache Stack chiplet technology, shows a prototype on Ryzen 5900X

We are all excited to know what’s next after Zen 3? AMD’s CPUs have entirely changed the landscape of processors with Ryzen and TSMC is its major driving force to make high-performing chips at low TDPs.

With 7nm, AMD is TSMC’s biggest customer and if we go by leaks, by 2023/2024, AMD will become the biggest customer for 5nm and 3nm process nodes. So, AMD’s CEO Dr. Lisa Su confirms Zen 4 is coming next year and also unveiled the tech behind next-gen CPUs from AMD.

AMD President and CEO Dr. Lisa Su unveiled the latest breakthrough in high-performance computing pioneered by AMD with new 3D chiplet technology.

“At Computex, we highlighted the growing adoption of our high-performance computing and graphics technologies as AMD continues setting the pace of innovation for the industry,” said Dr. Su.

“With the launches of our new Ryzen and Radeon processors and the first wave of AMD Advantage notebooks, we continue expanding the ecosystem of leadership AMD products and technologies for gamers and enthusiasts. The next frontier of innovation in our industry is taking chip design into the third dimension. Our first application of 3D chiplet technology at Computex demonstrates our commitment to continue pushing the envelope in high-performance computing to significantly enhance user experiences. We are proud of the deep partnerships we have cultivated across the ecosystem to power the products and services that are essential to our daily lives.”

Accelerating Chiplet and Packaging Innovation

AMD continues to build on its leadership IP and investments in leading manufacturing and packaging technologies with AMD 3D chiplet technology, a packaging breakthrough that combines AMD’s innovative chiplet architecture with 3D stacking using an industry-leading hybrid bond approach that provides over 200 times the interconnect density of 2D chiplets and more than 15 times the density compared to existing 3D packaging solutions.

Pioneered in close collaboration with TSMC, the industry-leading technology also consumes less energy than current 3D solutions. It is the most flexible active-on-active silicon stacking technology in the world.

AMD showed the first application of 3D chiplet technology at COMPUTEX 2021 – a 3D vertical cache bonded to an AMD Ryzen™ 5000 Series processor prototype designed to deliver significant performance gains across a broad set of applications. AMD is on track to begin production on future high-end computing products with 3D chiplets by the end of this year.

This next-generation 3D stacking design will revolutionize AMD’s chiplet architecture as AMD plans to stack several IPs on top of each other. So, Dr Lisa Su showed off first of a kind Ryzen 9 5900X with a 3D V-Cache with 64 MB of L3 SRAM.

We see a standard Zen 3 CCD sitting next to a 3D packaged CCD that measures 6mmx6mm. Interestingly, if you closely see, the size of the Zen 3 based CCD remains the same, but there’s another package on top of the CCD that houses 64 MB of cache, adding on to the 32 MB of L3 cache already featured on the Zen 3 CCD.

So, AMD promises to provide more cache to each CCD, directly benefiting the cores to provide better IPC and gaming performance. So, on a Ryzen 9 5900X prototype, we see 96 MB of L3 cache per CCD or up to 192 MB of total L3 cache on the whole Ryzen 9 5950X CPU.

AMD was even up for demoing the Ryzen 9 5900X prototype with 3D chiplet technology running various games like Gears V and delivering up to 12% faster performance because of increased game cache size. On average, AMD is now claiming to provide a 15% performance increase with the 3D V-Cache design. 

It is not clearly stated which generation of CPUs will be using this tech but you can bet it is coming on upcoming Zen 4 based Raphael CPUs next year. Now, Intel will launch Alder Lake by the end of this year and maybe AMD could use this tech on the Ryzen 5000 XT refreshed chips to give slight edge to its already popular Ryzen 5000 series.