Apple looks to have kept its new M1 Max silicon a carefully guarded secret. New images of the chip’s backside show that it may contain an interconnect bus that supports Multi-Chip-Module (MCM) scalability, allowing the business to stack numerous dies in a chiplet-based architecture.
This might lead to processors with up to 40 CPU cores and 128 GPU cores. Apple has yet to confirm chiplet-based design options, although the M1 Max could theoretically expand into an “M1 Max Duo” or possibly an “M1 Max Quadra” configuration, coinciding with recurring claims of future chiplet-based M1 designs.
Apple has previously wowed the world with the performance of its Arm-based M1 CPUs not once, but twice. The company’s newest M1 Max processor is a force to be reckoned with in and of itself; the chip’s massive 57 billion transistors allow Apple to scale up to 10 CPU cores and either 24 or 32 GPU cores (depending on the configuration) on a single 5nm chip. Including support for a chiplet-based architecture might theoretically increase computational resources and hence performance.
Apple would be able to scale its processors via the interconnect bus by “gluing together” the necessary number of M1 Max chips. Of course, flipping one M1 Max chip and aligning it with the second isn’t enough; Apple would still need to employ particular interposer and packaging choices for a chiplet-based architecture.
Interestingly, Apple’s M1 Pro chip (which sits between the M1 and M1 Max SoCs) lacks the connection bus – it’s housed in the M1 Max’s extended half (a beefier version of the M1 Pro). This most likely suggests that Apple anticipates users that want the increased graphics computation capability in the M1 Max (such as graphics or television studios) will demand further performance scaling via this chiplet design philosophy.
An “M1 Max Duo” processor that combines two 520 mm2 Apple M1 Max dies might produce up to 20 CPU cores and 48 or 64 GPU units. It would also necessitate tripling the system’s RAM to 128 GB. Memory bandwidth should expand up to 800 Gb/s in such a system. That appears to be feasible within the present M1 Max design, however, the 10,040 mm2 of Apple silicon would be more expensive.
Choosing the “M1 Max Quadra” option, which has 40 CPU cores and 128 GPU cores, would be much more difficult. Perhaps an additional I/O die, as suggested by the source, is the best answer, but there are many others. Apple may also maintain sufficient inter-die bandwidth via an I/O technique similar to AMD’s Infinity Fabric. Other leaks have stated that the architecture would be enlarged in a monolithic form, thus it’s unclear whether the bigger chips will require an I/O die.
Once again noting that Apple’s marketing diagrams do NOT accurately represent the floor plan of its chips, here is a less fanciful interpretation of the Pro Mac SoC rumors.
— John Siracusa (@siracusa) May 21, 2021
Presenting Jade-C: The building block for Pro Mac SoCs. (M1 included for scale.) pic.twitter.com/Lp8ZBDeLiu
It’s unknown how Apple will manage memory bandwidth scaling in the end, and any solution would result in much higher platform development expenses overall. However, these hypothetical “M1 Max Duo” and “M1 Max Quadra” goods would appeal to a market that values performance and power efficiency over price.
Also read: NVIDIA and Arm’s $40 billion deal blocked by The Federal Trade Commission
