AMD’s RAMP to accelerate DDR5 Memory on its AM5 Platform competing directly with Intel

HWiNFO announced a few days ago that the latest edition of its monitoring program would include AMD RAMP functionality. While we didn’t have any other information at the time, the developer has now confirmed that AMD RAMP is a DDR5 acceleration technology similar to Intel’s XMP.

The technology is exactly what it sounds like: an AMD XMP competitor. The AMD RAMP technology is expected to debut with the AM5 platform, accelerating DDR5 memory beyond JEDEC specifications. For the time being, AMD Ryzen desktop CPUs have been unable to match Intel’s XMP rates, which have now surpassed 6000 Mbps. With RAMP, that is supposed to alter (Ryzen Accelerated Memory Profile).

Following are the list of changes coming to HWiNFO soon:

• HWiNFO64 ported to UNICODE.
• Enhanced Intel XMP 3.0 Revision 1.2 support.
• Enhanced sensor monitoring on some ASRock B660 and H610 series.
• Added preliminary support of AMD RAMP.
• Enhanced support of future AMD AM5 platforms.

HWiNFO’s author and developer verified RAMP support with AMD’s next-generation Ryzen 7000 Desktop CPUs, which will be supported on the AM5 platform, in a post on Computerbase Forums. Memory manufacturers and motherboard manufacturers will be able to collaborate to provide the finest DDR5 DIMM support on their respective products thanks to this technology. RAMP would also allow AMD Ryzen CPUs to catch up to the massive DDR5 rates that Alder Lake presently supports, and it will be further enhanced with AMD’s Raptor Lake CPUs, which are expected to arrive around the same time as AMD’s Zen 4 chips.

According to Computerbase, it’s unclear whether AMD RAMP will become an established technology, as it hasn’t with AMD’s earlier attempts such as A-XMP and AMP (AMD Memory Profile). As AMD launches its next-generation AM5 platform, it will be wonderful to see a well-established memory overclocking standard from the company.

Raphael will be the codename for the next-generation Zen 4 based Ryzen Desktop CPUs, which will replace the Vermeer dubbed Zen 3 based Ryzen 5000 Desktop CPUs. Raphael CPUs will be based on the 5nm Zen 4 core architecture and will feature 6nm I/O dies in a chiplet design, according to the information we currently have. AMD has hinted that the core counts of its next-generation standard desktop CPUs would be increased, so we may expect a small increase from the present maximum of 16 cores and 32 threads.

The Zen 4 design is expected to give up to a 25% increase in IPC over the Zen 3 architecture and clock speeds of roughly 5 GHz. Stack chiplets will be present in AMD’s future Ryzen 3D V-Cache processors based on the Zen 3 architecture, and that design is expected to be carried over to AMD’s Zen 4 line of chips as well.

In terms of the platform, AM5 motherboards will use the LGA1718 socket, which is expected to survive a long time. DDR5-5200 memory, 28 PCIe lanes, extra NVMe 4.0 and USB 3.2 I/O, and native USB 4.0 capability may be included in the platform. The X670 flagship and the B650 mainstream will be the first two 600-series chipsets for AM5. The X670 chipset motherboards are likely to support both PCIe Gen 5 and DDR5 memory, although ITX boards are expected to only use B650 chipsets due to the increased size.

The Raphael Ryzen Desktop CPUs are also likely to include RDNA 2 onboard graphics, implying that, like Intel’s mainstream desktop range, AMD’s mainstream desktop lineup will offer GPU graphics. The number of GPU cores on the upcoming chips is expected to range between 2-4, according to speculations (128-256 cores). This will be less than the RDNA 2 CU count found on AMD’s next Ryzen 6000 APUs ‘Rembrandt,’ but it will be enough to keep Intel’s Iris Xe iGPUs at bay.

The Raphael Ryzen CPUs based on Zen 4 isn’t anticipated until late 2022, so there’s still plenty of time. The processors will compete with Intel’s Raptor Lake 13th Generation Desktop CPUs.

also read:

NVIDIA claims its acquisition of Arm is necessary for the latter’s survival in wake of Intel’s ambitious chip-making plans

Source