According to Blocks and Files, the manufacturer of X-NAND flash memory claims to have doubled the performance of its storage for its second generation of chips by enabling data writing in parallel. In this approach, QLC flash, which is more affordable and has higher capacities, may provide SLC levels of performance thanks to X-NAND.
All generations of flash memory can use Neo Semiconductor’s X-NAND architecture, which divides each plane of the 3D matrix into four to 16 sub-planes that can all be accessed simultaneously while using page buffers to maximise speed. This concept is compressed down in Gen 2 X-NAND (opens in new tab) (PDF), which uses one plane to write to another instead of the previous three planes to write to a fourth.
A Gen 2 3D X-NAND chip can be written at 3,200 MBps instead of 1,600 MBps as in the previous generation, and the system operates 20 times quicker than ordinary NAND flash.
This is a straightforward explanation for how things speed up. Improvements in latency are also present, but no information has been made public about them. Speaking after receiving the award, Neo Semiconductor’s founder and CEO, Andy Hsu, said: “This award recognizes our efforts to introduce to the NAND market a truly innovative technology with a wide array of capabilities that address the growing performance bottlenecks in IT systems and consumer products. X-NAND Gen-2, which doubles throughput over X-NAND Gen1, enables the customer to achieve SLC-like performance with larger capacity and lower cost QLC memory. X-NAND Gen2 incorporates zero-impact architectural and design changes that do not increase manufacturing costs while offering extraordinary throughput and latency improvements.”
At this year’s Flash Memory Summit, which took place in Santa Clara, California, from August 2 to 4, the Gen 2 technology won Best in Show (opens in new tab). Neo claims that the new technology does not increase manufacturing costs or die sizes and is compatible with existing manufacturing processes.
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