AMD’s Aldebaran Instinct Accelerator will reportedly have a two-die design

Aldebaran, the brightest star of the Taurus constellation, is 44 times the size of our solar system’s sun. It’s also more luminous than our sun, so taking given the capabilities of Aldebaran, AMD proceeded to name its upcoming Instinct Accelerator after the star.

The mentioning of Aldebaran has appeared a few times in Linux patch notes. As we know, it will be a two-die design which was half-implied in February and confirmed last month: “on Aldebaran, only primary die fetches valid power data. Show power/energy values as 0 on the secondary die.”

We can confirm that it will be the first AMD Accelerator/GPU that will leverage an MCM (multi-chip module) design from the released notes. MCM is the technique that’s been plastered on patents for years, but it has just begun to take actual shape.

It implies that multiple chips/dies will be connected closely, allowing for more scalability than traditional monolithic designs. This will also reduce the per-compute unit performance of a card, especially in poorly parallelized workloads.

However, if AMD makes its move, it’s hard to believe that its rival will stay silent. According to reports, Nvidia plans to challenge Aldebaran with its own MCM designs based on the Hopper architecture, which will be announced next year. On the other hand, Intel, a new player entering the GPU market, will soon release the Ponte Vecchio accelerator based on the Xe HPC architecture and an early MCM implementation.

According to the patch notes, the accelerator also mentions the support for a “new HBM2 memory type,” presumably the HBM2e. However, if AMD planned to use SK Hynix’s new HBM2e memory modules with 3.6 Gbps of bandwidth and a 4096-bit bus on each die, then the Aldebaran accelerator would have an amazing 3.6 TB/s of memory bandwidth.

Aldebaran’s predecessor, the Instinct MI100 or formerly codenamed Arcturus, has 32 GB of HBM2 and has 1.2 TB/s of memory bandwidth. On the other hand, Nvidia’s A100 accelerator has a configuration of up to 80 GB of 3.2 Gbps HBM2e memory for 2 TB/s of bandwidth. So it seems a logical solution for AMD to go with SK Hynix’s HBM2e memory modules.

AMD CEO Dr Lisa Su had this to say about the MI200 Accelerator or the Aldebaran:

“This year, as I said, we’re putting together our next generation CDNA architecture. This is a key component that enabled us to win the largest supercomputer bids in the US… And we will be launching the next generation of that architecture, actually, later this year. We’re very excited about it. I think it’s progressed extremely well.”

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