In Linux 5.18, Intel’s enigmatic Software Defined Silicon (SDSi) technique for adding features to Xeon CPUs will be officially supported. Users can add functionality to their CPU after they’ve purchased it with SDS. Formal SDSi support means that the technology will be included in Intel’s upcoming Xeon processors, meaning that Sapphire Rapids will be the first CPUs to have SDS.
Last September, Intel began distributing Linux patches to enable its SDS capability. Several patches have already been issued, and it appears that they will be included in Linux 5.18, which is expected to be released this spring. According to Phoronix, Hans de Goede, a long-time Linux engineer who works at Red Hat on a variety of hardware enablement projects, asserts that SDS will be included in Linux 5.18 if no issues arise.
Intel Software Defined Silicon (SDS) is a software-based approach for activating extra silicon characteristics in server CPUs that have already been manufactured and deployed. While formal support for the functionality will be available in Linux 5.18 this spring, Intel hasn’t said what exactly it expects to offer with its pay-as-you-go CPU upgrade model. We have no idea how it works or what it can do, but we can make educated estimates.
Every generation of Intel Xeon CPUs introduces new features to expand Intel’s server platform’s capabilities. For example, Intel’s Xeon Scalable CPUs (of various generations) now enables up to 4.5TB of memory per socket, network function virtualization, Speed Select technology, and a huge SGX enclave size, to mention a few features. There are also optimal models for search, virtual machine density, infrastructure as a service (IaaS), software as a service (SaaS), liquid cooling, and media processing, among other things. Intel wants to provide even more functionality targeted for certain use cases to its 4th Generation Xeon Scalable ‘Sapphire Rapids’ CPUs.
However, almost none of Intel’s clients require all of the provided functions, necessitating the development of specialized models. The Xeon Scalable 3rd-Gen range, for example, has 57 SKUs. However, in terms of the number of cores and clocks/TDP, all of Intel’s Xeon Scalable CPUs are essentially the same, with different functionalities simply removed to make distinct models.
Intel earns a premium by offering workload-optimized SKUs, but disabling certain features from certain models, then marking them appropriately and shipping them separately from other SKUs (shipped to the same client) is costly — it can cost tens of millions of dollars per year (or even more) in additional logistical costs, not to mention the added confusion to an already complex product stack.
Other use cases involve repurposing existing equipment and/or upgrading certain functionalities as they become necessary. For example, a data center may buy the ability to modify CPUs in terms of speeds and TDPs without having to change servers or CPUs. Intel has yet to reveal all of the features of SDS, as well as its exact plans for the mechanism, but we are confident that the technology will appear shortly.
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