According to @harukaze5719 and @xinoassassin1 on Twitter, next-generation Nvidia Ada GPU architecture will dramatically rise in L2 cache sizes. According to the new leak, L2 sizes on the new architecture have increased by 16x over Nvidia’s existing GeForce RTX 30 series GPUs, putting it on par with AMD’s Radeon RX 6000 series GPUs with Infinity Cache technology.
The flagship Ada die, the AD102, is expected to have the largest cache capacity of the entire series, at 96MB (16MB per 64-bit memory controller), while the AD103 and AD104 dies may only get 64MB. The cache on the AD106 will be 48MB, whereas the store on the AD107 will be 32MB. Nonetheless, the cache size of the AD107 surpasses that of Nvidia’s most powerful GPUs today, which are based on the GA102 chip, which has only 6MB of cache.
It’s easy to see why Nvidia takes such an unusual step with its Ada architecture. According to previous studies, Ada could have 71 per cent more cores than Ampere. Of course, with more seats, memory bandwidth must be increased to ensure that each is constantly fed with data, and enhancing bandwidth utilisation with a larger cache is a viable alternative if you don’t want to go to a broader memory interface.
With the introduction of its RNDA2-based Radeon RX 6000 series GPUs, AMD was the first firm to demonstrate the full potential of huge internal caches on GPUs. AMD’s Infinity Cache was introduced with RDNA2, and it added a substantial L3 store to the GPU and the previous L0, L1, and L2 caches.
These caches are substantially larger than previous generations of Nvidia and AMD GPUs, with 128MB of Infinity Cache on the top RDNA2 die. In tests with GPUs like the RX 6800 XT and RX 6900 XT, it was discovered that these massive cache sizes could eliminate bottlenecks caused by the GPU’s relatively weak 256-bit memory bus, which paled in comparison to Nvidia’s RTX 3080, which has a 320-bit bus, and the RTX 3090, which has a 384-bit bus. Nvidia’s RTX 3080 and 3090 GPUs also use faster GDDR6X memory, whereas AMD’s GPUs use standard GDDR6 ICs.
Despite the RX 6800 XT and RX 6900 XT’s seemingly inferior memory arrangement, both GPUs were able to compete with Nvidia’s counterparts because of the enormous pool of Infinity Cache.
Ada will be the first time Nvidia has borrowed a page from AMD’s playbook, and it will most likely address the more critical core count requirements with larger caches rather than simply increasing raw bandwidth with faster ICs and wider bus widths. According to the leak, Nvidia is not only adopting huge L2 stockpiles, but it is also keeping its bus widths the same as current generation Ampere GPUs. This means that, like AMD, Nvidia will rely more on internal caches to maintain high memory bandwidth.
Samsung just announced 21Gbps GDDR6X modules and updated GDDR6+ and GDDR7 roadmaps. Nvidia may be able to use the faster ICs to acquire even greater memory bandwidth. On the other hand, AMD chose standard GDDR6 modules for the complete RDNA2 series, including the 6900 XT LC, which uses 18.5 GDDR6.
RDNA3 could feature as much as 256MB to 512MB of infinity cache, according to recent sources, which would be 2.7x and 5.4x larger than Ada’s current L2 cache size forecasts. However, there is a limit of diminishing returns with most caching systems, and even a 512MB L3 cache may not significantly enhance performance over a 128MB cache.
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