@harukaze5719 recently discovered shipping records for the premium Ryzen “Strix Halo” APUs from AMD once again; the maximum thermal design power reached no less than 120W. The documents were hosted on nbd.ltd and described numerous shipments of the same chip, apparently – oriented to customers for review and testing. What’s more interesting, the manifesto reveals the Maple DAP reference evaluation platform, equipped with either 32 GB or 64 GB of DRAM.
AMD Ryzen ‘Strix Halo’ APUs Revealed
However, unlike Lunar Lake CPUs, it is important to keep in mind that the memory modules are not integrated into the package, being factory-soldered to the reference platform, respectively. The listed AMD Ryzen “Strix Halo” APUs exhibit a TDP of 120W, consistent with expectations for maximum TDPs potentially reaching up to 130W. The reference evaluation platform is based on the FP11 board platform.
Markedly, the AMD Strix Halo APUs will come as chiplet-based offerings, based on 3 dies – i.e. 2 CCDs and 1 GCD. Most importantly, the Zen 5 cores on the V-Core will not change, as is the L1 and L2 cache structure – however, the maximum L2 cache per chiplet will be 16 MB, and the L3 cache per CCD will be 32 MB. As a result, the absolute best chips can reach up to 64 MB of L3 cache. According to the source, it is notable that the CCDs might not be the ones featured in Granite Ridge since only the GCD is mentioned, thus it is yet to be seen whether the IOD is integrated into the package.
On the iGPU front, similarly to Alder Lake APUs described earlier, Strix Halo APUs will maintain the RDNA 3+ graphics architecture. However, iGPUs will have 20 WGPs or 40 CUs. To accommodate high-performance iGPUs in a chiplet design, IOD will incorporate 32 MB of MALL cache on the IOD itself, thereby releasing bandwidth constraints for the iGPU. Additionally, supports LPDDR5x-8000 256-bit memory and an AI “XDNA 2” NPU capable of 70+ TOPs. These APUs will be based on the latest FP11 platforms and will have a TDP of 70W cTDP of 55W and a peak of 130W.
All aforementioned AMD Strix and Strix Halo APUs will be media engine-enabled with eDP after all. DP2.1 HBR3 and external DP DP2.1 UHBR10, USBC Alt-DP DP2.1 UHBR10 and USB4 Alt-DP DP2.1 UHBR10. Particularly, Strix Halo’s maximum support is actually in DP2.1 UHBR20 This next-gen Zen 5 “Ryzen” CPU portfolio is likely to be officially announced and unveiled at AMD’s Computex 2024 keynote, with additional information expected within the next month.
