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TSMC to reportedly increase the production and yield of its 3nm node by Next Year

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According to a recent report in the Taiwanese press, the Taiwan Semiconductor Manufacturing Company (TSMC) continues to make progress on its N3E semiconductor manufacturing technology. TSMC is the largest contract chip manufacturer in the world, and it is currently updating its capabilities to the 3-nanometer chip node. The company’s progress with the new technology has sparked market worry, with many speculations alleging that TSMC is having manufacturing efficiency issues.

Latest news from the Taiwanese publication UDN, which cites sources within TSMC’s supply chain to discuss the 3nm process’s current situation. The many technologies in this family have been named ‘N3’ by TSMC, and two variants, N3E and N3B, are said to be on their way to the production lines.

It means that TSMC will speed up volume manufacturing of the N3E process next year, with the first items scheduled to be delivered to Apple, Inc. in Cupertino, California. Apart from Apple, the fab’s N3E customers are said to include Qualcomm Incorporated and Intel Corporation. This form of the N3 process is the second generation, and it will be introduced after the N3B node.

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While admitting that the business ran into bottlenecks with the 3nm process, UDN claims that they have been alleviated as a result of the process improvement. The research and development done to improve 3nm, in particular, has resulted in synergies with the 2nm process. TSMC’s 3nm node will use classic FinFET transistor designs, while the 2nm node will use a novel GAAFET design.

TSMC to use its Nanke sector for Apple and Hsinchu for Intel

TSMC
Samsung Foundry’s diagram shows the evolution of a transistor from FinFET to GAAFET and then MBCFET.The 3nm process from the Korean company will utilize GAAFET transistors, which it has developed in partnership with International Business Machines Corporation (IBM). However, Samsung’s production efficiency has long raised some questions in the industry for its previous chip technologies. Image: Samsung Electronics

According to UDN’s sources, TSMC’s plant in Taiwan’s Nanke sector will produce the chips for Apple, while its plant in Hsinchu will produce them for Intel. When combined, the 3nm production strategy will mark the first time TSMC manufactures a process technology in both Taiwan’s North and South regions at the same time.

In addition, it includes a value for predicted 3nm output levels. According to a report published earlier this month by another Taiwanese outlet, Digitimes, the initial 3nm output will range between 40,000 and 50,000 wafers each month. According to UDN, the Nanke plant will produce 15,000 3nm wafers per month, while the Hsinchu centre would produce 10,000 to 20,000 wafers every month. It goes on to say that N3E output might reach 50,000 monthly wafers next year, with an initial capacity of 25,000 wafers per minute.

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Finally, the Hsinchu plant, which is expected to produce chips for Intel, will be TSMC’s first conversion of a research and development centre into a production line. This facility was previously only responsible for trial production, and this alleged conversion reveals the nature of TSMC’s relationship with Intel, as well as the impact these orders will have on the fab’s existing 3nm capacity allotment. According to supply chain sources, TSMC expects to increase output while raising 3nm yield next year.

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Nivedita Bangari
Nivedita Bangari
I am a software engineer by profession and technology is my love, learning and playing with new technologies is my passion.

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