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Intel vs AMD: Who’ll win the FPGA leadership?

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With AMD (AMD) acquiring Xilinx (XLNX), the multi-decade competition with Intel (INTC) in FPGAs will continue. Intel demonstrated that it is the undisputed leader in FPGAs. If Intel can translate this into market share gains (there is no evidence of this yet, but this could be due in part to shortages), Xilinx and thus AMD (investors) could be in big trouble.

In Longer-term, Intel’s next-gen FPGA poses an even greater threat to AMD and Xilinx, as it appears to have a breakthrough architecture that might bring unparalleled advancements due to Intel’s packaging supremacy, bolstering Intel’s position.

An FPGA is a programmable logic device, as the name implies. This is best illustrated by comparing it to other types of chips: an FPGA can be “written” at the logic (boolean) level, whereas a CPU is fully programmable through software and an ASIC has a specific algorithm baked in hardware. This means that the logic will be tuned to the algorithm (like an ASIC), but it will be reprogrammable to accommodate alternative algorithms. This leads to differences in speed, flexibility, and efficiency between fixed-function circuits and CPUs.

When the first rumour of a Xilinx-AMD acquisition surfaced, I analyzed it: AMD To Acquire Xilinx: The Imitation Games Continue. The final announcement of the acquisition, which is expected to close by the end of the year, has made little difference to the narrative.

Since Intel acquired FPGAs half a decade ago, the synergies of CPUs and FPGAs have been known: an FPGA can be used as a data centre accelerator, an AI accelerator, a SmartNIC, and a network infrastructure accelerator. Although, as I previously stated, these synergies have not resulted in significant growth for Intel’s FPGA (programmable solutions group) business. While (the standalone) Xilinx may have performed slightly better, its financial results have also been mixed.

To elaborate, calling the Altera acquisition a failure is at best deceptive. The Intel + Altera combination is precisely the same as AMD + Xilinx: take a CPU and add an FPGA, contrary to what AMD and Xilinx management would like investors to believe. Then either (1) use it as an accelerator or a SmartNIC for offloading in the data centre, (2) use it as part of a broader network infrastructure portfolio, or (3) utilize it to seek other edge opportunities.

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Two more arguments:

  • As far as technology is concerned, the synergies of Altera-Intel are much broader. Some may remember that Altera was Intel’s first landmark foundry customer long before Intel Foundry Services. So Altera uses Intel’s manufacturing and additionally is also the leading user of Intel’s industry-leading advanced chiplet packaging (with EMIB). Additionally, Intel’s one API software initiative also encompasses FPGAs, creating a unified and open programming model spanning CPUs, GPUs, FPGAs, and NPUs.
  • The go-to-market synergies, as well as overall portfolio, are also in favor of Intel: Intel has a leading position in (5G) network infrastructure as a whole, compared to AMD who is still mostly absent in this market. (Although AMD bulls have argued that this allows AMD to expand into new markets.) Intel further has an ASIC business and also acquired Basic for an even broader portfolio: Intel calls this the “logic continuum” from programmable to non-programmable silicon.

AMD’s chances of launching an FPGA in the PC market are slim. CPUs (particularly Intel’s) already have a plethora of accelerators, but there does not appear to be a value proposition for FPGAs. Of course, AMD could try it and possibly create a new market, but in the more likely scenario that it would go largely unutilized, an FPGA would only add cost to the CPU.

Second, as previously stated, the data center is the more promising market for FPGAs. However, it turns out that integrating an FPGA into the CPU is also unnecessary in this case. The rationale for this is the same as why GPUs aren’t included in data centers and why Nvidia has a market cap of $800 billion based only on GPUs: an accelerator like a GPU or FPGA may simply be connected to the CPU over a regular PCIe interconnect link.

Some may claim, however, that integration has some advantages, such as cache coherency. However, the industry is on the approach of adopting a new interconnect standard dubbed CXL for just this reason (as proposed by Intel in 2019, and backed by the full industry including AMD, Xilinx, and Arm).

Summing up the Altera-Intel developments:

  • Due to pre-acquisition delays, Altera was one year behind Xilinx in moving to the 14/16nm node.
  • However, Intel moved quickly and immediately invested in a parallel development team, working on 10nm Agilex well before the 14nm Stratix 10 even started sampling. As a result, Agilex and Versal started sampling around the same time in mid-2019. This means Intel moved to process technology parity in just one generation.
  • Altera has been a highly successful Intel foundry customer. Altera is leveraging both Intel’s leading processes as well as Intel’s leading 2.5D and 3D chiplet packaging technologies, which has resulted in a rich chiplet ecosystem. Note that this was long before AMD even launched its first MCP (multi-chip package) (“Naples”, 2017) into the market, let alone AMD’s first semi-chiplet design (“Rome”, 2019). Hence, contrary to what AMD fans often state, the industry’s first adopter of chiplets is Altera.
  • As a result, Stratix 10 and Agilex are part of an ever-larger chiplet ecosystem of first-party and third-party chiplets. This remains the only real, cross-vendor, and cross-foundry chiplet ecosystem in the industry. I called AMD’s approach semi-chiplet since it is still based on the legacy MCP approach.
  • To show what this has allowed Intel to accomplish: despite the mentioned pre-acquisition delay, Intel was still able to deliver the industry’s first 16/14nm FPGAs with (1) integrated HBM, (2) 58G transceivers, and (3) PCIe 4.0.
  • Intel also acquired eASIC in 2019, which creates ease. These provide a feature set (in terms of cost, time to market, power, performance, etc.) somewhere between ASICs and FPGAs. These ASICs can also be added to the Agilex FPGA as a chiplet.
  • Intel in 2019 created the Network and Custom Logic to deliver on the network synergies mentioned above. While Intel has seen some revenue drops because of lower FPGA sales in networking, Intel has said that these sales were shifted from Intel FPGAs to Intel ASICs. More recently, Intel said that it has been unable to fulfill all orders due to the shortages: “DSG revenue was $486 million, down 3% year-over-year due to significant supply constraints. Demand continues to significantly exceed supply for FPGAs.”
  • Intel FPGAs are also a key part of Intel’s heterogenous XPU strategy, which on the software side translates into support in Intel’s one API initiative.
  • Intel’s FPGAs are also aligned to its AI everywhere strategy since Intel launched the 14nm Stratix 10 NX with Tensor Blocks a few years ago. FPGAs can beat GPUs by perhaps an order of magnitude in some workloads’ inefficiency.

On the Xilinx side:

  • Xilinx is calling its Versal products APACs (adaptive compute acceleration platform) instead of FPGAs, to highlight the inclusion of further IP and accelerators (such as for 5G and AI), which broaden as well as enhance their use-cases beyond traditional FPGAs.
  • These PACs could be seen as the monolithic equivalent of Intel’s approach of adding further capabilities to its FPGAs via chiplets: Xilinx’s 7nm Versal roadmap consists of no less than six product lines (of monolithic chips).
  • Xilinx’s equivalent of one API is its Vitis software. But obviously, this remains an FPGA-only solution, whereas one API is targeted towards Intel’s full silicon portfolio.

FPGA management

Given that both companies’ roadmaps are well-defined, a comparison is possible. One thing to keep in mind here is that, despite Intel and Xilinx both moving to 10nm/7nm at the same time, Intel has been able to establish a clear leadership position through architectural leadership.

As previously stated, both companies are taking a somewhat similar but also divergent approach at the 10nm/7nm generation. While both companies are expanding their product lines with multiple SKUs, Xilinx appears to be taking a more targeted approach with a wide range of Versal ACAPs for several segments it is targeting (such as edge, 5G, and machine learning). As a result, Xilinx is concentrating more on integrating multiple accelerators around the FPGA platform, hence the name ACAP. It’s worth noting that these are all monolithic chips.

The Agilex FPGAs, on the other hand, is largely focused on upgrading the core FPGA fabric (with Intel’s HyperFlex 2 architecture), with claims of 40% higher performance (frequency) or 40% lower power consumption. Agilex also introduces 116G transceivers, PCIe 5.0, DDR5, and CXL in future variations, as well as hardened bfloat16, AI data type compatibility, better DSP performance (but no specialized AI acceleration yet), and 116G transceivers, PCIe 5.0, DDR5 and CXL (through new chiplets).

As a result of these developments, Agilex now has a very clear and tangible FPGA leadership over Xilinx for pure FPGA applications (which do not use any of the accelerators). This is exactly what Intel emphasized as part of its Ice Lake-SP data center launch in early 2021 (comparisons with Versal):

  • 50% better video IP performance
  • 2x better (fabric) performance per watt
  • 30% better (fabric) performance

The second major distinction is Intel’s continued chiplet strategy: the fundamental 10nm FPGA remains the same, but an ecosystem of chiplets can be attached to personalize the FPGA. This technique has significant cost, feature, and time-to-market advantages due to the customized chiplet ecosystem. Some of the features indicated above, such as 116G transceivers, PCIe 5.0/CXL, and HBM, will only be available once these technologies become available in the future.

When Agilex first began sampling in 2019, 116G transceivers, DDR5, and PCIe 5.0 or CXL were not yet available, so Intel’s FPGAs are essentially future-proofed due to this chiplet approach: Intel would simply have to create a small chiplet with (for example) PCIe 5.0 support. Versal FPGAs, on the other hand, will never be able to receive PCIe 5.0 support unless Xilinx goes through the costly process of developing a new full-fledged monolithic chip. Of course, Xilinx will never do this for the sake of adding a single feature.

This essentially means that, in addition to performance (as discussed above), Intel also wins in connectivity and I/O support, as Versal lacks 116G transceivers, DDR5, PCIe 5.0, and CXL 1.1 support. To summarise, Xilinx’s ACAP method may provide better performance in some workloads, but investors should also be aware of Intel’s larger portfolio, which includes ASICs and easy, as well as the chiplet ecosystem (which easily allows adding other accelerators and features). In fact, given its improved HyperFlex2 architecture (with up to 2x performance/watt as well as greater performance), Intel’s Agilex appears to be the fastest FPGA by a large margin when it comes to pure general-purpose FPGA performance.

With the introduction of its Stratix 10 FPGA in 2017, Intel was a year behind Xilinx, but Versal and Agilex began sampling around the same time in mid-2019. Agilex has also demonstrated strong leadership abilities and efficiency. Given the longer customer design cycles, it is common for FPGA shipments to take 3-4 years to reach peak volume. Looking ahead, Intel is developing what could be a revolutionary FPGA, given the “1-2 orders of magnitude” improvement cited by Intel.

Intel’s FPGAs are notable because they have served as the launch vehicle for the company’s most recent packaging and chiplet technologies, resulting in a large chiplet library. Specifically, Intel’s continuous transceiver leadership (58G-116G-224G) supports this viewpoint. Finally, FPGAs play an important role in Intel’s AI strategy, as does Intel’s one API software.

To gain leadership, Intel is implementing some of its most sophisticated technologies in FPGAs. It needs to be seen whether this will result in increased market share.

Source

Avatar of Nivedita Bangari
Nivedita Bangari
I am a software engineer by profession and technology is my love, learning and playing with new technologies is my passion.

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